Implement in the 2FOC a filter for rejecting the current ripple due to the PWM voltage feeding the motor phases

[nunoguedelha]

This results from the analysis described in https://github.com/dic-iit/element_torque-control-via-current/issues/20 and https://github.com/dic-iit/element_torque-control-via-current/issues/61.
A filter should implement a filter at low level (at best in the current controller running on the 2FOC, for rejecting the current ripple due to the PWM voltage feeding the motor phases. The "ripples" main frequency is 20kHz, amplitude 100mA to 200mA.

This filter would actually have two effects on the measurements

• Filter the HES(Hall Effect Sensor)/ADC white noise noise of ~ ±100mA (refer to Analyze residual noise at zero phase current #89)
• by rejecting the current ripple due to the PWM, it would allow to have a more accurate measurement of the effective phase currents, as well as a more accurate calibration of the phase currents offsets:
  As it can be seen in this simulation plot from Increase the PWM frequency in order to reduce the current ripple due to PWM modulation #87 (comment)

PWM freq = 20 kHz (single phase case)

Current ripple amplitude = 2 A

and the plot from the oscilloscope in https://github.com/dic-iit/element_torque-control-via-current/issues/61#issuecomment-497319647

The current can be at it's lowest value or close at the instant the ADC samples the current measurement. The sampling occurs at the very beginning or end of the PWM period, so during the current ramp-down (refer to #87 (comment)):

• PxSECMP: Special Event Compare Register
This register provides the compare value at which the analog-to-digital conversions are to
be synchronized with the PWM time base. Comparison can be either during up-count or
down-count in Center-aligned mode depending on the setting of the SEVTDIR bit in this
register.

(Phase of ADC capture set relative to PWM cycle: when arrive to PTPER offset and counting down to avoid ripple on the current measurement)
SEVTDIR - Special Event Trigger Time Base Direction bit: 1 = Special Event Trigger will occur when the PWM time base is counting down
SEVTCMP <14:0> - Special Event Compare Value bits: 0x00 = at the bottom of the current ripple

So, even if we average the current across multiple calls of the main routine _DMA0Interrupt() (reads current measurements and computes the quadrature current), we might be averaging always the lowest level in the current ripples. This can induce an undesired offset.

The solution would be to trigger at each start of the PWM period a sequence of multiple sampling/conversion cycles (as many as possible, probably between 5 and 10), and average it for that period.

We would then get an average per PWM period, i.e. for each DMA interrupt prrocessing in _DMA0Interrupt(). Additional averaging across several calls of that interrupt wouldn't be necessary.

@ale-git , as we discussed earlier, please refer to the ADC manual here:
Section 16. Analog-to-Digital Converter (ADC)
16.13 SPECIFYING CONVERSION RESULTS BUFFERING

(I gathered the links to the documentation on the current measurement and conversion in #89).

[valegagge]

old issue. Nobody is working on this for a long time. closing