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LLVM_Epiphany.patch
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diff -Naur llvm-4.0.0.src.orig/cmake/config-ix.cmake llvm-4.0.0.src/cmake/config-ix.cmake
--- llvm-4.0.0.src.orig/cmake/config-ix.cmake 2017-01-07 01:16:00.000000000 +0200
+++ llvm-4.0.0.src/cmake/config-ix.cmake 2017-06-08 16:32:55.230427324 +0300
@@ -374,6 +374,8 @@
set(LLVM_NATIVE_ARCH Mips)
elseif (LLVM_NATIVE_ARCH MATCHES "xcore")
set(LLVM_NATIVE_ARCH XCore)
+elseif (LLVM_NATIVE_ARCH MATCHES "epiphany")
+ set(LLVM_NATIVE_ARCH EPIPHANY)
elseif (LLVM_NATIVE_ARCH MATCHES "msp430")
set(LLVM_NATIVE_ARCH MSP430)
elseif (LLVM_NATIVE_ARCH MATCHES "hexagon")
diff -Naur llvm-4.0.0.src.orig/CMakeLists.txt llvm-4.0.0.src/CMakeLists.txt
--- llvm-4.0.0.src.orig/CMakeLists.txt 2017-01-13 00:12:41.000000000 +0200
+++ llvm-4.0.0.src/CMakeLists.txt 2017-03-16 12:26:19.549648332 +0200
@@ -326,6 +326,7 @@
AMDGPU
ARM
BPF
+ Epiphany
Hexagon
Lanai
Mips
diff -Naur llvm-4.0.0.src.orig/include/llvm/ADT/Triple.h llvm-4.0.0.src/include/llvm/ADT/Triple.h
--- llvm-4.0.0.src.orig/include/llvm/ADT/Triple.h 2016-11-23 21:03:54.000000000 +0200
+++ llvm-4.0.0.src/include/llvm/ADT/Triple.h 2017-03-16 12:26:19.549648332 +0200
@@ -53,6 +53,7 @@
avr, // AVR: Atmel AVR microcontroller
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
+ epiphany, // Epiphany E16 backend
hexagon, // Hexagon: hexagon
mips, // MIPS: mips, mipsallegrex
mipsel, // MIPSEL: mipsel, mipsallegrexel
diff -Naur llvm-4.0.0.src.orig/include/llvm/Object/ELFObjectFile.h llvm-4.0.0.src/include/llvm/Object/ELFObjectFile.h
--- llvm-4.0.0.src.orig/include/llvm/Object/ELFObjectFile.h 2016-12-16 00:36:53.000000000 +0200
+++ llvm-4.0.0.src/include/llvm/Object/ELFObjectFile.h 2017-03-16 12:26:19.553648385 +0200
@@ -903,6 +903,8 @@
return "ELF32-iamcu";
case ELF::EM_X86_64:
return "ELF32-x86-64";
+ case ELF::EM_ADAPTEVA_EPIPHANY:
+ return "ELF32-epiphany";
case ELF::EM_ARM:
return (IsLittleEndian ? "ELF32-arm-little" : "ELF32-arm-big");
case ELF::EM_AVR:
diff -Naur llvm-4.0.0.src.orig/include/llvm/Support/ELF.h llvm-4.0.0.src/include/llvm/Support/ELF.h
--- llvm-4.0.0.src.orig/include/llvm/Support/ELF.h 2016-12-27 21:59:29.000000000 +0200
+++ llvm-4.0.0.src/include/llvm/Support/ELF.h 2017-03-16 12:27:38.426729836 +0200
@@ -310,6 +310,7 @@
EM_RISCV = 243, // RISC-V
EM_LANAI = 244, // Lanai 32-bit processor
EM_BPF = 247, // Linux kernel bpf virtual machine
+ EM_ADAPTEVA_EPIPHANY = 0x1223, // Adapteva's Epiphany architecture
// A request has been made to the maintainer of the official registry for
// such numbers for an official value for WebAssembly. As soon as one is
@@ -522,6 +523,11 @@
#include "ELFRelocs/Mips.def"
};
+// ELF Relocation types for Epiphany
+enum {
+#include "ELFRelocs/Epiphany.def"
+};
+
// Special values for the st_other field in the symbol table entry for MIPS.
enum {
STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional
diff -Naur llvm-4.0.0.src.orig/include/llvm/Support/ELF.h.rej llvm-4.0.0.src/include/llvm/Support/ELF.h.rej
diff -Naur llvm-4.0.0.src.orig/include/llvm/Support/ELFRelocs/Epiphany.def llvm-4.0.0.src/include/llvm/Support/ELFRelocs/Epiphany.def
--- llvm-4.0.0.src.orig/include/llvm/Support/ELFRelocs/Epiphany.def 1970-01-01 02:00:00.000000000 +0200
+++ llvm-4.0.0.src/include/llvm/Support/ELFRelocs/Epiphany.def 2017-03-16 12:26:19.553648385 +0200
@@ -0,0 +1,33 @@
+#ifndef ELF_RELOC
+#error "ELF_RELOC must be defined"
+#endif
+
+ELF_RELOC(R_EPIPHANY_NONE, 0)
+
+/* Absolute address relocations. */
+ELF_RELOC(R_EPIPHANY_8, 1)
+ELF_RELOC(R_EPIPHANY_16, 2)
+ELF_RELOC(R_EPIPHANY_32, 3)
+
+/* PC-relative relocations. */
+ELF_RELOC(R_EPIPHANY_8_PCREL, 4)
+ELF_RELOC(R_EPIPHANY_16_PCREL,5)
+ELF_RELOC(R_EPIPHANY_32_PCREL,6)
+
+/* special forms for 8/24 bit branch displacements. */
+ELF_RELOC(R_EPIPHANY_SIMM8, 7)
+ELF_RELOC(R_EPIPHANY_SIMM24, 8)
+
+/* HIGH and LOW relocations taking part of a 32 bit address and
+ depositing it into the IMM16 field of a destination. */
+ELF_RELOC(R_EPIPHANY_HIGH, 9)
+ELF_RELOC(R_EPIPHANY_LOW, 10)
+
+/* 11 bit signed immediate value. */
+ELF_RELOC(R_EPIPHANY_SIMM11, 11)
+/* 11 bit magnitude addressing displacement. */
+ELF_RELOC(R_EPIPHANY_IMM11, 12)
+
+/* 8 bit immediate for MOV.S R,IMM8. */
+ELF_RELOC(R_EPIPHANY_IMM8, 13)
+
diff -Naur llvm-4.0.0.src.orig/lib/Object/ELF.cpp llvm-4.0.0.src/lib/Object/ELF.cpp
--- llvm-4.0.0.src.orig/lib/Object/ELF.cpp 2016-11-01 18:59:37.000000000 +0200
+++ llvm-4.0.0.src/lib/Object/ELF.cpp 2017-03-16 12:26:19.553648385 +0200
@@ -132,6 +132,13 @@
break;
}
break;
+ case ELF::EM_ADAPTEVA_EPIPHANY:
+ switch (Type) {
+#include "llvm/Support/ELFRelocs/Epiphany.def"
+ default:
+ break;
+ }
+ break;
default:
break;
}
diff -Naur llvm-4.0.0.src.orig/lib/Support/Triple.cpp llvm-4.0.0.src/lib/Support/Triple.cpp
--- llvm-4.0.0.src.orig/lib/Support/Triple.cpp 2016-11-23 21:03:54.000000000 +0200
+++ llvm-4.0.0.src/lib/Support/Triple.cpp 2017-03-16 12:26:19.553648385 +0200
@@ -28,6 +28,7 @@
case avr: return "avr";
case bpfel: return "bpfel";
case bpfeb: return "bpfeb";
+ case epiphany: return "epiphany";
case hexagon: return "hexagon";
case mips: return "mips";
case mipsel: return "mipsel";
@@ -100,6 +101,8 @@
case hexagon: return "hexagon";
+ case epiphany: return "epiphany";
+
case amdgcn: return "amdgcn";
case r600: return "r600";
@@ -256,6 +259,7 @@
.Case("armeb", armeb)
.Case("avr", avr)
.StartsWith("bpf", BPFArch)
+ .Case("epiphany", epiphany)
.Case("mips", mips)
.Case("mipsel", mipsel)
.Case("mips64", mips64)
@@ -375,6 +379,7 @@
.Case("arm64", Triple::aarch64)
.Case("arm", Triple::arm)
.Case("armeb", Triple::armeb)
+ .Case("epiphany", Triple::epiphany)
.Case("thumb", Triple::thumb)
.Case("thumbeb", Triple::thumbeb)
.Case("avr", Triple::avr)
@@ -608,6 +613,7 @@
case Triple::bpfeb:
case Triple::bpfel:
case Triple::hexagon:
+ case Triple::epiphany:
case Triple::lanai:
case Triple::hsail:
case Triple::hsail64:
@@ -1149,6 +1155,7 @@
case llvm::Triple::arm:
case llvm::Triple::armeb:
case llvm::Triple::hexagon:
+ case llvm::Triple::epiphany:
case llvm::Triple::le32:
case llvm::Triple::mips:
case llvm::Triple::mipsel:
@@ -1231,6 +1238,7 @@
case Triple::arm:
case Triple::armeb:
case Triple::hexagon:
+ case Triple::epiphany:
case Triple::kalimba:
case Triple::le32:
case Triple::mips:
@@ -1279,6 +1287,7 @@
case Triple::UnknownArch:
case Triple::avr:
case Triple::hexagon:
+ case Triple::epiphany:
case Triple::kalimba:
case Triple::lanai:
case Triple::msp430:
diff -Naur llvm-4.0.0.src.orig/lib/Target/LLVMBuild.txt llvm-4.0.0.src/lib/Target/LLVMBuild.txt
--- llvm-4.0.0.src.orig/lib/Target/LLVMBuild.txt 2016-11-01 19:27:54.000000000 +0200
+++ llvm-4.0.0.src/lib/Target/LLVMBuild.txt 2017-03-16 12:26:19.553648385 +0200
@@ -24,6 +24,7 @@
AArch64
AVR
BPF
+ Epiphany
Lanai
Hexagon
MSP430
diff -Naur llvm-4.0.0.src.orig/utils/llvm-build/llvmbuild/componentinfo.pyc llvm-4.0.0.src/utils/llvm-build/llvmbuild/componentinfo.pyc
\ No newline at end of file
diff -Naur llvm-4.0.0.src.orig/utils/llvm-build/llvmbuild/configutil.pyc llvm-4.0.0.src/utils/llvm-build/llvmbuild/configutil.pyc
\ No newline at end of file
diff -Naur llvm-4.0.0.src.orig/utils/llvm-build/llvmbuild/__init__.pyc llvm-4.0.0.src/utils/llvm-build/llvmbuild/__init__.pyc
\ No newline at end of file
diff -Naur llvm-4.0.0.src.orig/utils/llvm-build/llvmbuild/main.pyc llvm-4.0.0.src/utils/llvm-build/llvmbuild/main.pyc
\ No newline at end of file
diff -Naur llvm-4.0.0.src.orig/utils/llvm-build/llvmbuild/util.pyc llvm-4.0.0.src/utils/llvm-build/llvmbuild/util.pyc
\ No newline at end of file