LPC fixups #19
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LPC fixups #19
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Signed-off-by: Timothy Pearson <[email protected]>
Allow 16-bit LPC addresses in both read and write routines
…f to HBBL HBBL tests for LPC attached firmware by executing a single read then checking the OPB LPC error status register. If any LPC operation failed during SBE execution, even if the failure was harmless (e.g. write to nonexistent status display device) HBBL will assume the error status applies to the initial firmware test read. Make sure the error status register is clear before handing off to HBBL.
SBE trace messages are not automatically enabled in this case due to PIBMEM size constraints
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sharkcz
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Apr 7, 2020
| @@ -7,6 +7,7 @@ | |||
| /* */ | |||
| /* Contributors Listed Below - COPYRIGHT 2015,2018 */ | |||
| /* [+] International Business Machines Corp. */ | |||
| /* COPYRIGHT 2020 Raptor Engineering, LLC */ | |||
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Is this form of the copyright header right?
sharkcz
reviewed
Apr 7, 2020
| @@ -7,6 +7,7 @@ | |||
| /* */ | |||
| /* Contributors Listed Below - COPYRIGHT 2015,2018 */ | |||
| /* [+] International Business Machines Corp. */ | |||
| /* COPYRIGHT 2020 Raptor Engineering, LLC */ | |||
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Is this form of the copyright header right?
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Probably not, actually. The whole header seems odd, it looks auto-generated but we don't have access to the tooling to regenerate it. If there's a preferred format I'll update.
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Fix potential HBBL hang
Add optional printf() support over serial
Fix FTBFS in various trace statements